Since years, we are working on a programming library, PHAST library, to enable single-source sequential coding and automatically obtain high-performance code for (currently) multi-cores and NVIDIA GPUs. The major objectives of the PHAST approach were, and are, allowing programmers to work at high-level, to promote high productivity while still maintain the selective possibility to reach lower-level details, if and when needed, to specify ad-hoc targeting. Recently we have included the task and task-DAG support into the same framework, as well as the possibilty to decide at compile time, and even at runtime, where a specific task needs to be scheduled (multi-core CPU resources or GPU). Our published papers highlight that a) we outperform existing approaches, low- and high-level ones, considering various code productivity metrics (SLOCS, Halstead mental discriminations, cyclomatic complexity) and that b) we can reach near native, and sometimes better, performance even on challenging applications (es.: AES). These features allow to ease the development, optimization, tuning and design-space exploration of task assignments to the available parallel hardware resources without needing to re-code the application for each of them.
All of this is very relevant in the development of emerging complex applications (which are remping up in the market) for heterogeneous architectures (which are the de-facto standard in the embedded, desktop, datacenter and HPC domains) , with limited effort from the programmers, which can be application-domain expert but NOT experts of parallel programming.
From these premises emerges our interest in joining the Alliance as we deem that there can be great opportunities of cross-fertilization and joint initiatives in the domain of heterogeneous architectures.
Therefore, we